Аннотация:Simulators have drawbacks due to the total time taken for the simulation.Therefore, two simulators should be integrated to produce a robust simulator to overcome this hurdle.The main aim of this research which is to integrate two open-source simulators to study the simulation of DDR4 is achieved.GEM5 and DRAMSim2 are integrated for DDR4 simulation using ISA x86.DRAM Controller codes and codes to access the bank or bank groups in DDR4 are modified for DDR4.The parameters of DDR4 -24000 passed into the simulation.Based on the simulation results, GEM5 DRAMSim2 has verified its correctness and legal to be used for DDR4 simulations.The modified DRAM Controller codes for DDR4 from DDR3 is proven working when 100% pass.GEM5 DRAMSim2 is 99.2% faster than previous work done with GEM5 -NVMain.Moreover, GEM5 DRAMSim2 used only 23% power from the overall power to perform ACT/PRE activities during the execution of 20 000 instructions.Furthermore, simulation of DDR4 using GEM5 DRAMSim2 used 40% less background power compared to previous GEM5 -NVMain work.The performance of DDR4 using GEM5 DRAMSim2 is fast because the correlation between the average bandwidth and average latency is 0.9975.This research proved that the integrated GEM5 DRAMSim2 is an effective and efficient simulator for DRAM simulations.
